收稿日期: 2010-07-14
修回日期: 2010-10-19
网络出版日期: 2011-07-15
基金资助
Supported by the National Natural Science Foundation of China(61073038)
Parallelization and performance optimization of video feature extractions on multi-core systems
Received date: 2010-07-14
Revised date: 2010-10-19
Online published: 2011-07-15
Supported by
Supported by the National Natural Science Foundation of China(61073038)
张琦 , 陈玉荣 , 李建国 , 胡云 , 许胤龙 . 基于多核系统的视频特征提取程序并行化及性能优化方法[J]. 中国科学院大学学报, 2011 , 28(4) : 531 -547 . DOI: 10.7523/j.issn.2095-6134.2011.4.015
The low-level video feature extractions are the most time-consuming components in content-based video information retrieval systems. In this paper we study parallelization and performance optimization methods of four video feature extractions on multi-core systems. Experiments show that the processing speeds of these programs are 17 times the original processing speed on average when eight cores are used. Besides, detailed performance analysis helps us find bottlenecks and suggest ways to further improve multi-core systems performance in future.
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