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Hardware/software task partitioning and scheduling algorithm on multi-core system on chip with reconfigurable hardware
Received date: 2010-01-25
Revised date: 2010-04-02
Online published: 2010-09-15
Embedded Multi-core system on a chip with reconfigurable hardware is efficient and flexible. Hardware/software task partitioning and scheduling are critical to minimization of the overall run-time of applications on such a platform. A high performance algorithm combining HW/SW task partitioning and scheduling is proposed in this paper. The algorithm can produce both partition results and schedule results at the same time. The time complexity of the proposed algorithm is O(V(E+V)+V2logV+PVlogV). The experimental results show the feasibility and effectivity of the proposed algorithm.
MA Hong-Xing , ZHOU Xue-Hai , GAO Yan-Yan , ZHANG Hui-Zhen . Hardware/software task partitioning and scheduling algorithm on multi-core system on chip with reconfigurable hardware[J]. Journal of University of Chinese Academy of Sciences, 2010 , 27(5) : 664 -669 . DOI: 10.7523/j.issn.2095-6134.2010.5.013
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