A CMOS high performance 50MSPS sample/hold circuit

LI Tie; GUO Li; BAI Xue-fei

doi:10.7523/j.issn.2095-6134.2007.6.010

Journal of University of Chinese Academy of Sciences >

2007 , Vol. 24 >Issue 6: 788 - 793

DOI: https://doi.org/10.7523/j.issn.2095-6134.2007.6.010

论文

A CMOS high performance 50MSPS sample/hold circuit

LI Tie ,
GUO Li ,
BAI Xue-fei

Expand

Department of Electronic Science and Technology, USTC

Received date: 1900-01-01

Revised date: 1900-01-01

Online published: 2007-11-15

Fold

Abstract

A high performance CMOS sample/hold circuit is presented, which achieves the precision of 10-bit over Nyquist band in 50-MHz sampling frequency at 3.3-V supply. This circuit uses full differential circuits, bottom-plate sampling, bootstrap circuits and high performance gain-boost operational amplifier. Simulation in 0.35-μm CMOS process shows the circuit consumes 18-mW of power.

Key words： sample/hold; CMOS; bootstrap; gain-boost operational amplifier

Cite this article

LI Tie , GUO Li , BAI Xue-fei . A CMOS high performance 50MSPS sample/hold circuit[J]. Journal of University of Chinese Academy of Sciences, 2007 , 24(6) : 788 -793 . DOI: 10.7523/j.issn.2095-6134.2007.6.010

Options

Outlines

模态框（Modal）标题

Abstract

Cite this article