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›› 2006, Vol. 23 ›› Issue (2): 263-269.DOI: 10.7523/j.issn.2095-6134.2006.2.036

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Azimuth Compression of Space-Borne SAR Based on FPGAs

ZHENG Xiao-Shuang, YU Wei-Dong   

  1. 1The institute of Electronics, Chinese Academy of Sciences, Beijing 100080, China;

    2Graduate School of the Chinese Academy of Sciences, Beijing 100049, China

  • Received:1900-01-01 Revised:1900-01-01 Online:2006-03-15

Abstract: Real-time Imager is essential for intending space-borne Synthetic Aperture Radar (SAR). A space-borne SAR with a real-time imager integrated in it has augmented performance and broadened applications. Azimuth compression is a key in real-time imaging. This paper explains the rationale of azimuth compression of SAR and analyzes the parameters of the real-time imager in detail, then puts forward a method of azimuth compression based on FPGAs, which is used in real-time imager in space-borne SAR. Such a processor for azimuth compression concerns ISA interface, FFT operating, match filtering and absolute value computing. Considering the special demands of devices used in space environment, Xilinx VirtexII FPGAs are selected as main devices for this design. The simulation of point target and result of raw data imaging demonstrate that this method meets the requirements of real time processing in space-borne SAR.

Key words: Synthetic Aperture Radar (SAR) Real-time Imager Field Programmable Gate Array (FPGA)

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