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Research Articles

Interpolation-based anti-jamming E-D-gate DS-SS code tracking architecture

  • TIAN Yu ,
  • LI Guo-Tong ,
  • YANG Gen-Qing
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  • Shanghai Micro-Sat Joint Key Laboratory, Chinese Academy of Sciences, Shanghai 200050, China

Received date: 2008-09-17

  Revised date: 2009-03-02

  Online published: 2009-07-15

Abstract

DS-SS is widely used in LEO satellite communication. Since jamming exists in UHF/VHF wave band, which is commonly selected by LEO communication system, anti-jamming module is necessary in receivers. To control the power consuming, an interpolation-based one-sample-per-chip receiver architecture is developed. Performance analyses show that this architecture cuts off half of anti-jamming module computation burden at the cost of the SNR lose less than 0.1dB. By this approach, computation burden and power consuming can be reduced remarkably.

Cite this article

TIAN Yu , LI Guo-Tong , YANG Gen-Qing . Interpolation-based anti-jamming E-D-gate DS-SS code tracking architecture[J]. Journal of University of Chinese Academy of Sciences, 2009 , 26(4) : 513 -516 . DOI: 10.7523/j.issn.2095-6134.2009.4.012

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