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中国科学院大学学报 ›› 2013, Vol. 30 ›› Issue (5): 682-687.DOI: 10.7523/j.issn.2095-6134.2013.05.017

• 信息与电子科学 • 上一篇    下一篇

用于空间遥感相机模拟源系统的DDR2 SDRAM高速存储电路设计

倪建军1,2, 李涛2, 王建宇2   

  1. 1. 中国空间技术研究院神州学院, 北京 100086;
    2. 北京空间机电研究所, 北京 100076
  • 收稿日期:2012-09-26 修回日期:2013-01-21 发布日期:2013-09-15
  • 基金资助:
    国家863计划(2008AA121902)资助 

Circuit design of DDR2 SDRAM high-speed memory for space remote sensing camera simulator system

NI Jian-Jun1,2, LI Tao2, WANG Jian-Yu2   

  1. 1. ShenZhou Academy, China Academy of Space Technology, Beijing 100086, China;
    2. Beijing Institute of Space Mechanics & Electricity, Beijing 100076, China
  • Received:2012-09-26 Revised:2013-01-21 Published:2013-09-15
  • Contact: 倪建军,E-mail:cast_2011@sina.com

摘要: 为了满足空间遥感相机电子学系统的功能验证需求,设计了一套由FPGA和DDR2 SDRAM等组成的空间遥感相机模拟源系统. 针对DDR2 SDRAM在设计时的难度,从提高信号完整性出发,对DDR2 SDRAM的阻抗匹配形式和匹配电阻位置进行详细分析,并对PCB布局布线及FPGA管脚约束设计给出可行性设计方案. 实验结果表明,按照提出的设计方法,DDR2 SDRAM不论采用单端或差分时钟工作,均可保证数据以320 Mbps/pin来传输,信号质量依然理想.

关键词: 现场可编程门阵列, 双倍速率同步动态随机存储器, 管脚约束, 空间遥感相机模拟源系统

Abstract: In order to meet the function verification requirements of the space remote sensing camera electronics system, we design a set of simulator system composed of FPGA and DDR2 SDRAM. For considering difficulties in designing DDR2 SDRAM and for improving the signal integrity, we analyze the DDR2 SDRAM impedance matching form and matching resistance location in detail and give a feasible design scheme on PCB layout and FPGA pin constraints. Experimental results show that DDR2 SDRAM works at data transmission speed of 320 Mbps/pin with either single-ended or differential clock, and the signal quality is still satisfactory.

Key words: FPGA, DDR2 SDRAM, pin constraints, space remote sensing camera simulator system

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