关键词: FPGA, RS-232C驱动, VHDL, FCS校验

Abstract:

In the project, the FPGA is required to communicate with the host computer. According to the conditions of the project, RS232C is chosen as a standard bus protocol and interface specification to design the UART driver. The goal of the design is to fulfill the communication in a short range. The design uses asynchronous communication and the FCS to keep the signal integrity and the veracity of the communication data. The software is programmed in VHDL language. Through long time testing, the driver is stable in working in the whole system and owns the capability to correct some errors in the data. The design of the driver provides a reliable means for the communication between the host computer and the FPGA and it is of deep significance.

Key words: FPGA, RS-232C driver, VHDL, FCS checkout