Welcome to Journal of University of Chinese Academy of Sciences,Today is

›› 2010, Vol. 27 ›› Issue (5): 664-669.DOI: 10.7523/j.issn.2095-6134.2010.5.013

• Research Articles • Previous Articles     Next Articles

Hardware/software task partitioning and scheduling algorithm on multi-core system on chip with reconfigurable hardware

MA Hong-Xing, ZHOU Xue-Hai, GAO Yan-Yan, ZHANG Hui-Zhen   

  1. Department of Computer Science and Technology, University of Science and Technology of China, Hefei 230027, China
  • Received:2010-01-25 Revised:2010-04-02 Online:2010-09-15

Abstract:

Embedded Multi-core system on a chip with reconfigurable hardware is efficient and flexible. Hardware/software task partitioning and scheduling are critical to minimization of the overall run-time of applications on such a platform. A high performance algorithm combining HW/SW task partitioning and scheduling is proposed in this paper. The algorithm can produce both partition results and schedule results at the same time. The time complexity of the proposed algorithm is O(V(E+V)+V2logV+PVlogV). The experimental results show the feasibility and effectivity of the proposed algorithm.

Key words: task graphs, HW-SW task partitioning, task scheduling, reconfigurable computing

CLC Number: