Architecture design and optimization for motion estimation with dynamic search range

doi:10.7523/j.issn.2095-6134.2012.4.012

›› 2012, Vol. 29 ›› Issue (4): 512-517.DOI: 10.7523/j.issn.2095-6134.2012.4.012

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Architecture design and optimization for motion estimation with dynamic search range

CHEN Yun-Bi¹, GUO Li¹, LI Zheng-Dong², CHI Ling-Hong¹

1. Department of Electronic Science and Technology, University of Science and Technology of China, Hefei 230027, China;
2. Staff room of Electronic and Technology, Chongqing Communication College, Chongqing 400035, China

Received:2011-03-14 Revised:2011-06-07 Online:2012-07-15

Abstract

Abstract: A VBSME with dynamic search range is proposed to overcome the defects of the engine with fixed search range, and it reduces off-chip bandwidth, computational complexity, and power dissipation. A circularly distributed storage structure is adopted to realize the access to the dynamic search area. Besides, the time-consuming SAD computing array is divided into the balanced and adder-optimized pipelines. The implementation results show that, compared to traditional engines, the proposed engine can achieve significant improvements of the hardware and the power efficiency without much loss of throughput.

Key words: motion estimation, dynamic search range, memory bandwidth, pipeline, VLSI

CLC Number:

TN47

CHEN Yun-Bi, GUO Li, LI Zheng-Dong, CHI Ling-Hong. Architecture design and optimization for motion estimation with dynamic search range[J]. , 2012, 29(4): 512-517.

References

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Architecture design and optimization for motion estimation with dynamic search range

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