Design of CCSDS image compression system based on FPGA

doi:10.7523/j.issn.2095-6134.2011.1.015

Abstract

Abstract:

We report the design and implementation of CCSDS image data compression (IDC) parallel scheme based on FPGA. This scheme includes four modules: discrete wavelet transform(DWT), direct coefficient quantified encoding, bit plane encoding(BPE),and code processing. In order to put on speed, we use the parallel scanning and parallel encoding in the BPE module. The experimental results show the feasibility and efficiency of this scheme, and compared to the modified method of CCSDS IDC serial encoding, the processing time has reduced by 13.6%. Our scheme is fit for image data compression in the space communication.

Key words: CCSDS, image compression, bit plane encoding, FPGA

CLC Number:

TN403

CHEN Zhe, TU Guo-Fang, ZHANG Can, CHEN De-Yuan. Design of CCSDS image compression system based on FPGA[J]. , 2011, 28(1): 101-107.

References

[1] Bhasin K, Hayden J. Developing architectures and technologies for an evolvable NASA space communication infrastructure . NASA/TM,2004-213108.

[2] CCSDS 120.1-G-1. Image data compression recommended standard
[S].Green Book, 2007.

[3] Yeh P S, Armbruster P, Kiely A,et al. The new CCSDS image compression recommendation //Proceedings of the IEEE Aerospace Conference.2005:4138- 4145.

[4] CCSDS 122.0-B-1.Image data compression recommended standard
[S].Blue Book, 2005.

[5] Lan K,Jonathan R.Measuring the gap between FPGAs and ASICs
[J]. IEEE Transaction on Compater-aided Design of Integrated Circus and Systems, 2007,26(2):203-215.

[6] Zhang X Q,Gu X D,Sun H X.Design and implementation of CCSDS-based onboard image compression unit using FPGA
[J].Semiconductor Optoelectronics,2009,30(6):935-939. 张学全, 顾晓东, 孙辉先.CCSDS星载图像压缩模块的FPGA设计与实现
[J].半导体光电,2009,30(6): 935-939.

[7] Zhang J Y. Deep space communication image compression algorithms based on discrete wavelet transformation and application . Harbin: Research Center on Communication, Harbin Institute of Technology, 2007 (in Chiense). 张佳岩. 基于小波变换的深空通信图像压缩算法及应用研究 .哈尔滨:哈尔滨工业大学通信技术研究所, 2007.

[8] Daubechies I, Sweldens W. Factoring wavelet transforms into lifting schemes
[J]. Journal of Fourier Analysis and Application, 1998, 4(3): 245-267.

[9] Jerome M. Embedded image coding using zerotrees of wavelet Coefficient
[J]. IEEE Transaction on Signal Processing, 1993,41(12):3445-3462.

[10] Rice R F, Plaunt J R.Adaptive variable length coding for efficient compression of spacecraft television data
[J]. IEEE Transmission on Communication Technology, 1971,19(1): 889- 897.

[11] Lian C J,Chen K F, Chen H H,et al. Analysis and architecture design of block-coding engine for EBCOT in JPEG2000
[J]. IEEE Transaction on Circuit and System for Video Techonoly, 2003,13(3):219-230.

[1]	ZHANG Xue, JIANG Quanjiang, LIANG Guang, YU Jinpei. Design and implementation of a generic parallel architecture for LDPC codes based on FPGA [J]. , 2020, 37(5): 714-719.
[2]	SU Bin, LIU Chang, PAN Zhigang. Design and implementation of high-speed floating points FFT processor based on FPGA [J]. , 2015, 32(2): 259-263.
[3]	YE Xi-En, ZHU Yin-Feng. Design of PCI transmission card based on pci_t32 [J]. , 2013, 30(5): 688-693.
[4]	NI Jian-Jun, LI Tao, WANG Jian-Yu. Circuit design of DDR2 SDRAM high-speed memory for space remote sensing camera simulator system [J]. , 2013, 30(5): 682-687.
[5]	WANG Jing, LIU Zhong-Sheng, DING Bin, XIANG Mao-Sheng, WEI Li-Deng, SUN Xi-Rui. Real-time data acquisition system for baseline measurements of InSAR based on PCI and FPGA [J]. , 2013, 30(1): 53-59.
[6]	LI Lin-Sen, ZHANG Can, CHEN De-Yuan. Joint source encryption coding based on CCSDS image data compression standard [J]. , 2012, (3): 384-391.
[7]	WANG Lu, ZHANG Zhi-Min. SAR image compression based on modified SPIHT [J]. , 2012, (2): 220-226.
[8]	QI Yong-Jun, NI Ji-Jun. Study on the real-time high precision control of large quantity displacement actuators for extremely large telescope based on FPGA [J]. , 2011, 28(5): 597-603.
[9]	CAI Xiao-Ning, CHEN Zhong-Lin, DONG Ge, XIE Shan-Ying. Optimization of digital PID controller on hardware [J]. , 2010, 27(5): 690-694.
[10]	SUN Tao, ZHANG Hua-Chun. Realization of FPGA-based MIL-STD-1553B bus remote terminals controller [J]. , 2010, 27(4): 523-529.
[11]	PAN Zhi-Gang, GAO Xin. An improved SPIHT algorithm for texture image compression [J]. , 2010, 27(2): 222-227.
[12]	LI Hai-Ping, KONG Xiang-Cheng. Design and implementation of FPGA UART [J]. , 2010, 27(2): 199-203.
[13]	XIE Dong-Hui, QI Wei-Min. Implementation of radar monitoring and controlling system based on the SOPC of NiosII CPU [J]. , 2010, 27(1): 63-69.
[14]	SUN Jia-Bin, YANG Hai-Gang. Design of a twisting-style switch matrix based on bus architecture [J]. , 2010, 27(1): 43-48.
[15]	LI Xin-Wei, ZHANG Ping, ZHU Lei. An airborne SAR motion compensation algorithm based on array scanning and its implementation [J]. , 2010, 27(1): 70-75.